The present invention relates to a semiconductor integrated circuit device, and more particularly to a technique which is applicable effectively to a chip carrier type semiconductor integrated circuit device.
In Japanese Patent Laid Open Nos. 249429/87 and 310139/88 there is described a chip carrier in which a semiconductor chip mounted on a package substrate is hermetically sealed with a cap.
In the chip carrier described in the above literatures, a package substrate formed of a ceramic material and a semiconductor chip are hermetically sealed with a cap which is formed in the turned square U-shape in section to provide a package structure, the semiconductor chip being face down bonded to electrodes through solder bumps so that a main surface thereof with elements formed thereon is opposed to the package substrate, said electrodes being formed on a thin wiring layer provided on a main surface of the package substrate, the thin wiring layer comprising a conductor layer of aluminum (Al) or copper (Cu) for example and an insulating layer of a polyimide for example. The back of the chip thus sealed in the cavity enclosed with the package substrate and the cap is bonded to the underside of the cap through a packed layer solder. Metallized layers are formed on the back of the semiconductor chip and also on both the underside and leg portion of the sealing cap.
In the interior of the package substrate there is formed an internal wiring, which provides an electrical connection between the electrodes formed on the thin wiring layer on the main surface side of the package substrate and electrodes formed on the underside of the package substrate. On the underside electrodes are formed solder bumps which serve as external terminals at the time of mounting the chip carrier to a module substrate for example.
The above chip carrier is assembled in the following manner, as described in Japanese Patent Laid Open No. 249429/87. First, positioning of a semiconductor chip is performed and the chip is face down bonded to a package substrate through solder bumps. Next, a soldering material, e.g. solder, is interposed between the back of the semiconductor chip and the underside of a cap and also placed in the portion to be sealed, that is, between the package substrate and leg portion of the cap. In this state, the cap is put on the package substrate and the whole is heated to a temperature not lower than the melting temperature of the soldering material to solder the members located on both sides of the soldering material and thereby seal the marginal portion of the semiconductor chip.